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A unified approach for memory protection in a bare-metal and a real time operating system

Published: 28 November 2019 Publication History

Abstract

In modern time almost all safety critical applications employ a Real Time Operating System(RTOS) to efficiently perform different embedded operations by using the powerful resources available on the silicon chip. As multiple tasks run in parallel in RTOS therefore they might intrude into each other's memory area and can corrupt someone else's data and as the result the running application can be crashed and it can bring down the whole system. Memory protection mechanism can guarantee that the system can be guarded against this intrusion. In this paper a unified approach has been presented to successfully implement the memory protection in a bare-metal and Real Time Object Oriented Dependable Operating System (RODOS).

References

[1]
Richard Barry. 2010. Using the FreeRTOS Real Time Kernel NXP LPC17xx Edition. ACM Trans. Program. Lang. Syst. (2010). https://www.freertos.org/Documentation/Using-the-FreeRTOS-Real-Time-Kernel\-A-Practical-Guide-LPC17xx-Edition-Document-Outline.pdf
[2]
Montenegro Dr. Sergio and Dannemann Frank. 2009. RODOS Real time kernel design for dependability. In Proceedings of DASIA 2009, data systems in aerospace. ESA Communication Production Office, Istanbul, Turkey.
[3]
Digital Equipment Corporation M. V. Wilkes. 1982. Hardware support for memory protection: Capability implementations. In ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems. ACM New York, NY, USA, Palo Alto, California, USA, 107--116.
[4]
SEGGER Microcontroller GmbH 2019. Real-Time Operating System User Guide Reference Manual. SEGGER Microcontroller GmbH. https://www.segger.com/downloads/embos/UM01001.
[5]
STMicroelectronics. 2019. Managing memory protection unit (MPU) in STM32 MCUs. (2019). https://www.st.com/content/ccc/resource/technical/document/application_note/group0/bc/2d/f7/bd/fb/3f/48/47/DM00272912/files/DM00272912.pdf/jcr:content/translations/en.DM00272912.pdf
[6]
STMicroelectronics NV 2017. Discovery kit with STM32F407VG MCU,User manual, UM1472. STMicroelectronics NV. https://www.st.com/content/ccc/resource/technical/document/user_manual/70/fe/4a/3f/e7/e1/4f/7d/DM00039084.pdf/files/DM00039084.pdf/jcr:content/translations/en.DM00039084.pdf.
[7]
Joseph Yiu. 2014. Definitive Guide to ARM CORTEX-M3 and CORTEX-M4 Processors. Vol. 3rd. Newnes, Burlington, MA 01803, USA.

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        cover image ACM Other conferences
        PCI '19: Proceedings of the 23rd Pan-Hellenic Conference on Informatics
        November 2019
        165 pages
        ISBN:9781450372923
        DOI:10.1145/3368640
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        Published: 28 November 2019

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        Author Tags

        1. memory management
        2. micrcontroller
        3. real time operating system

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        PCI '19
        PCI '19: 23rd Pan-Hellenic Conference on Informatics
        November 28 - 30, 2019
        Nicosia, Cyprus

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        PCI '19 Paper Acceptance Rate 18 of 35 submissions, 51%;
        Overall Acceptance Rate 190 of 390 submissions, 49%

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