[go: up one dir, main page]
More Web Proxy on the site http://driver.im/ skip to main content
10.1145/1013235.1013244acmconferencesArticle/Chapter ViewAbstractPublication PagesislpedConference Proceedingsconference-collections
Article

Larger-than-vdd forward body bias in sub-0.5V nanoscale CMOS

Published: 09 August 2004 Publication History

Abstract

This paper examines the effectiveness of larger-than-Vdd forward body bias (FBB) in nanoscale bulk CMOS circuits where Vdd is expected to scale below 0.5V. Equal-to and larger-than Vdd FBB schemes offer unique advantages over conventional FBB such as simple design overhead and reverse body bias capability respectively. Compared to zero body bias, they improve process-variation immunity and achieve 71% and 78% standby leakage savings at iso performance and iso active power at room temperature. We also suggest a novel temperature-adaptive body bias scheme to control active leakage and achieve 22% and 40% active power savings at higher temperatures.

References

[1]
Berkeley Predictive Technology Model, 2002, http://www-device.eecs.berkeley.edu/~ptm.
[2]
International Technology Roadmap for Semiconductors, 2003, http://public.itrs.net.
[3]
K. Ishibashi, T. Yamashita, Y. Arima, I. Minematsu, and T. Fujimoto. A 9uW 50MHz 32b adder using self-adjusted forward body bias in SoCs. In Intl. Solid-State Circuits Conf. Dig. Tech. Papers, pages 1--10, 2003.
[4]
C. Kim, J.-J. Kim, S. Mukhopadhyay, and K. Roy. A forward body-biased low-leakage SRAM Cache: device and architecture considerations. In Proc. Intl. Symp. Low Power Electronics and Design, pages 6--9, 2002.
[5]
M. Miyazaki, G. Ono, and K. Ishibashi. A 1.2-GIPS/W Microprocessor using speed-adaptive threshold-voltage CMOS with forward bias. IEEE J. Solid-State Circuits, 37(2):210--217, February 2002.
[6]
S. Narendra et al. A 1.1V 1GHz communications router with on-chip body bias in 150nm CMOS. In Intl. Solid-State Circuits Conf. Dig. Tech. Papers, pages 270--466, 2002.
[7]
S. Narendra, A. Keshavarzi, B. Bloechel, S. Borkar, and V. De. Forward body bias for microprocessors in 130nm technology generation and beyond. IEEE J. Solid-State Circuits, 38(5):696--701, May 2003.
[8]
S. Odanaka, T. Y. amd N. Shimizu, H. Umimoto, and T. Ohzone. A self-aligned retrograde twin-well structure with buried p+-layer. IEEE Trans. Electron Devices, 37(7):1735--1742, July 1990.
[9]
Y. Oowaki et al. A sub-0.1um circuit design with substrate-over-biasing. In Intl. Solid-State Circuits Conf. Dig. Tech. Papers, pages 88--89,420, 1998.
[10]
C. Park et al. Reversal of temperature dependence of integrated circuits operating at very low voltages. In Proc. Intl. Electron Devices Meeting, pages 71--74, 1995.
[11]
K. Shakeri and J. Meindl. Temperature variable supply voltage for power reduction. In Proc. IEEE Computer Society Annual Symp. VLSI, pages 64--67, 2002.
[12]
H. Soeleman, K. Roy, and B. Paul. Robust sub-threshold logic for ultra-low power operation. IEEE Trans. VLSI, 9(1):90--99, Feb 2001.
[13]
Synopsys. HSPICE Ver. 2003.3. 2003.
[14]
Synopsys. Taurus-Device Ver. 2003.6.0. 2003.
[15]
Y. Taur. CMOS scaling beyond 0.1um: how far can it go? In Proc. Intl. Symp. VLSI Tech., Systems and Appl., pages 6--9, 1999.
[16]
Y. Taur and T. Ning. Fundamentals of modern VLSI devices. Cambridge University Press, 2003.

Cited By

View all
  • (2022)Low-frequency noise in downscaled silicon transistors: Trends, theory and practicePhysics Reports10.1016/j.physrep.2022.06.005990(1-179)Online publication date: Dec-2022
  • (2017)A Novel SRAM Cell Design with a Body-Bias Controller Circuit for Low Leakage, High Speed and Improved StabilityWireless Personal Communications: An International Journal10.1007/s11277-016-3788-594:4(3513-3529)Online publication date: 1-Jun-2017
  • (2014)Efficient Power Gating of SIMD Accelerators Through Dynamic Selective Devectorization in an HW/SW Codesigned EnvironmentACM Transactions on Architecture and Code Optimization10.1145/262968111:3(1-23)Online publication date: 31-Jul-2014
  • Show More Cited By

Index Terms

  1. Larger-than-vdd forward body bias in sub-0.5V nanoscale CMOS

        Recommendations

        Comments

        Please enable JavaScript to view thecomments powered by Disqus.

        Information & Contributors

        Information

        Published In

        cover image ACM Conferences
        ISLPED '04: Proceedings of the 2004 international symposium on Low power electronics and design
        August 2004
        414 pages
        ISBN:1581139292
        DOI:10.1145/1013235
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

        Sponsors

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        Published: 09 August 2004

        Permissions

        Request permissions for this article.

        Check for updates

        Author Tags

        1. forward body bias
        2. junction leakage
        3. process variations
        4. sub-threshold leakage

        Qualifiers

        • Article

        Conference

        ISLPED04
        Sponsor:
        ISLPED04: International Symposium on Low Power Electronics and Design
        August 9 - 11, 2004
        California, Newport Beach, USA

        Acceptance Rates

        Overall Acceptance Rate 398 of 1,159 submissions, 34%

        Contributors

        Other Metrics

        Bibliometrics & Citations

        Bibliometrics

        Article Metrics

        • Downloads (Last 12 months)3
        • Downloads (Last 6 weeks)1
        Reflects downloads up to 14 Dec 2024

        Other Metrics

        Citations

        Cited By

        View all
        • (2022)Low-frequency noise in downscaled silicon transistors: Trends, theory and practicePhysics Reports10.1016/j.physrep.2022.06.005990(1-179)Online publication date: Dec-2022
        • (2017)A Novel SRAM Cell Design with a Body-Bias Controller Circuit for Low Leakage, High Speed and Improved StabilityWireless Personal Communications: An International Journal10.1007/s11277-016-3788-594:4(3513-3529)Online publication date: 1-Jun-2017
        • (2014)Efficient Power Gating of SIMD Accelerators Through Dynamic Selective Devectorization in an HW/SW Codesigned EnvironmentACM Transactions on Architecture and Code Optimization10.1145/262968111:3(1-23)Online publication date: 31-Jul-2014
        • (2010)FinFET SRAM DesignNanoelectronic Circuit Design10.1007/978-1-4419-7609-3_3(55-95)Online publication date: 19-Nov-2010
        • (2008)Computer Architecture Techniques for Power-EfficiencySynthesis Lectures on Computer Architecture10.2200/S00119ED1V01Y200805CAC0043:1(1-207)Online publication date: Jan-2008
        • (2008)Body bias voltage computations for process and temperature compensationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.91213716:3(249-262)Online publication date: 1-Mar-2008
        • (2008)Analysis and solutions to issue queue process variation2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN)10.1109/DSN.2008.4630066(11-21)Online publication date: Jun-2008
        • (2007)A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)10.1109/VLSID.2007.182(665-672)Online publication date: Jan-2007
        • (2007)Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers8th International Symposium on Quality Electronic Design (ISQED'07)10.1109/ISQED.2007.103(67-72)Online publication date: Mar-2007
        • (2006)Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systemsProceedings of the 2006 Asia and South Pacific Design Automation Conference10.1145/1118299.1118433(559-564)Online publication date: 24-Jan-2006
        • Show More Cited By

        View Options

        Login options

        View options

        PDF

        View or Download as a PDF file.

        PDF

        eReader

        View online with eReader.

        eReader

        Media

        Figures

        Other

        Tables

        Share

        Share

        Share this Publication link

        Share on social media