LC Oscillator Topology for Wide Locking Range" /> LC oscillator topology is proposed to enhance the locking range of the divider. A design guideline is described based on a theoretical analysis of the locking range enhancement. A test chip is fabricated in 65 nm CMOS. Measured locking range with 0 dBm input power is 48.5–62.9 GHz (25.9%), which is 63.6% wider compared to the previously reported ILFD. Power consumption excluding buffers and biasing circuits is 1.65 mW from 1.2 V supply. The core ILFD area is 0.0157 mm2 even with an extra pair of inductors." /> LC Oscillator Topology for Wide Locking Range" />
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A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range

Keita TAKATSU
Hirotaka TAMURA
Takuji YAMAMOTO
Yoshiyasu DOI
Koichi KANDA
Takayuki SHIBASAKI
Tadahiro KURODA

Publication
IEICE TRANSACTIONS on Electronics   Vol.E94-C    No.6    pp.1049-1052
Publication Date: 2011/06/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.1049
Print ISSN: 0916-8516
Type of Manuscript: BRIEF PAPER
Category: 
Keyword: 
ILFD,  locking range,  multi-order LC oscillator,  60-GHz,  CMOS,  

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Summary: 
A 60-GHz injection-locked frequency divider (ILFD) is presented. A multi-order LC oscillator topology is proposed to enhance the locking range of the divider. A design guideline is described based on a theoretical analysis of the locking range enhancement. A test chip is fabricated in 65 nm CMOS. Measured locking range with 0 dBm input power is 48.5–62.9 GHz (25.9%), which is 63.6% wider compared to the previously reported ILFD. Power consumption excluding buffers and biasing circuits is 1.65 mW from 1.2 V supply. The core ILFD area is 0.0157 mm2 even with an extra pair of inductors.