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PLAYGROUND: minimization of PLAs with mixed ground true outputs

Authors:

Chin-Long Wey,

Tsin-Yuan ChangAuthors Info & Claims

DAC '88: Proceedings of the 25th ACM/IEEE Design Automation Conference

Pages 421 - 426

Published: 01 June 1988 Publication History

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Abstract

A PLA (Programmable Logic Array) usually uses inverters to complement its output logic. The design can be easily modified using non-inverting buffers if complementary (or, ground true) outputs are needed. In this paper, we explore the tradeoffs in implementing PLAs with/without mixed ground true outputs. An efficient minimization algorithm, namely, PLAYGROUND, is presented. The PLAYGROUND program has been implemented on VAX 8600 in C language. The results of this study indicate that the number of product terms can be further reduced by as much as 50% from the results obtained by the ESPRESSO program when the mixed ground true outputs are used.

References

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Hong, S.J., Cain, R.G. and D.L. Ostapko, "MINI" a heuristic approach for logic minimization," IBM Journal of Research and Development, Sept. 1974, pp.~43-458.

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Chuquillanqui, S., and T. Perez Segovia,"PAOLA' A tool for topological optimization of large PLAs, " Proc. 19th Design Automation Conf., Las Vegas, June 1982, pp.300-306.

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Index Terms

PLAYGROUND: minimization of PLAs with mixed ground true outputs

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Information

Published In

DAC '88: Proceedings of the 25th ACM/IEEE Design Automation Conference

June 1988

730 pages

ISBN:0818688645

Chairmen:
Dennis W. Shaklee
AT&T/ISL, Denver, CO
,
A. Richard Newton
Univ. of California, Berkeley

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 June 1988

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DAC88

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SIGDA
IEEE

DAC88: Design Automation Conference

June 12 - 15, 1988

New Jersey, Atlantic City, USA

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DAC '88 Paper Acceptance Rate 125 of 400 submissions, 31%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Optimized reversible binary-coded decimal adders

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