Article

Area minimization of power distribution network using efficient nonlinear programming techniques

Authors:

Jun Gu,

Wayne DaiAuthors Info & Claims

ICCAD '01: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design

Pages 153 - 157

Published: 04 November 2001 Publication History

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Abstract

This paper deals with area minimization of power distribution network for VLSIs. A new algorithm based on efficient nonlinear programming techniques is presented to solve this problem. The experiment results prove that this algorithm has achieved the objects that minimize the area of power/ground networks with higher speed.

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Cited By

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Liu SLee CHuang CChen HLin CLee CMacii E(2013)Effective power network prototyping via statistical-based clustering and sequential linear programmingProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485690(1701-1706)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485690
Kahng AKang SLee H(2013)Smart non-default routing for clock power reductionProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488846(1-7)Online publication date: 29-May-2013
https://dl.acm.org/doi/10.1145/2463209.2488846
Li SShi JCai YHong XKyung CChoi KHa S(2008)Vertical via design techniques for multi-layered P/G networksProceedings of the 2008 Asia and South Pacific Design Automation Conference10.5555/1356802.1356953(623-628)Online publication date: 21-Jan-2008
https://dl.acm.org/doi/10.5555/1356802.1356953
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Area minimization of power distribution network using efficient nonlinear programming techniques

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Information

Published In

ICCAD '01: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design

November 2001

656 pages

ISBN:0780372492

Conference Chair:
Rolf Ernst
Tech. Univ. of Braunschweig, Braunschweig, Germany

Publisher

IEEE Press

Publication History

Published: 04 November 2001

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Article

Conference

ICCAD01

Sponsor:

SIGDA

ICCAD01: International Conference on Computer Aided Design

November 4 - 8, 2001

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Liu SLee CHuang CChen HLin CLee CMacii E(2013)Effective power network prototyping via statistical-based clustering and sequential linear programmingProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485690(1701-1706)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485690
Kahng AKang SLee H(2013)Smart non-default routing for clock power reductionProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488846(1-7)Online publication date: 29-May-2013
https://dl.acm.org/doi/10.1145/2463209.2488846
Li SShi JCai YHong XKyung CChoi KHa S(2008)Vertical via design techniques for multi-layered P/G networksProceedings of the 2008 Asia and South Pacific Design Automation Conference10.5555/1356802.1356953(623-628)Online publication date: 21-Jan-2008
https://dl.acm.org/doi/10.5555/1356802.1356953
Cai YShi JPan ZHong XTan S(2008)Large scale P/G grid transient simulation using hierarchical relaxed approachIntegration, the VLSI Journal10.1016/j.vlsi.2007.04.00341:1(153-160)Online publication date: 1-Jan-2008
https://dl.acm.org/doi/10.1016/j.vlsi.2007.04.003
Leung K(2005)SPIDERProceedings of the 2005 IEEE/ACM International conference on Computer-aided design10.5555/1129601.1129609(33-38)Online publication date: 31-May-2005
https://dl.acm.org/doi/10.5555/1129601.1129609
Fu JLuo ZHong XCai YTan SPan ZTang T(2005)VLSI on-chip power/ground network optimization considering decap leakage currentsProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1121005(735-738)Online publication date: 18-Jan-2005
https://dl.acm.org/doi/10.1145/1120725.1121005
Singh JSapatnekar SGroeneveld PScheffer L(2005)A fast algorithm for power grid designProceedings of the 2005 international symposium on Physical design10.1145/1055137.1055153(70-77)Online publication date: 3-Apr-2005
https://dl.acm.org/doi/10.1145/1055137.1055153
Fu JLuo ZHong XCai YTan SPan ZImai M(2004)A fast decoupling capacitor budgeting algorithm for robust on-chip power deliveryProceedings of the 2004 Asia and South Pacific Design Automation Conference10.5555/1015090.1015216(505-510)Online publication date: 27-Jan-2004
https://dl.acm.org/doi/10.5555/1015090.1015216
Chen HCheng CKahng AMori MWang QImai M(2004)Optimal planning for mesh-based power distributionProceedings of the 2004 Asia and South Pacific Design Automation Conference10.5555/1015090.1015201(444-449)Online publication date: 27-Jan-2004
https://dl.acm.org/doi/10.5555/1015090.1015201
Zhao MFu YZolotov VSundareswaran SPanda RMalik SFix LKahng A(2004)Optimal placement of power supply pads and pinsProceedings of the 41st annual Design Automation Conference10.1145/996566.996615(165-170)Online publication date: 7-Jun-2004
https://dl.acm.org/doi/10.1145/996566.996615
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