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2B-SSD: the case for dual, byte- and block-addressable solid-state drives

Authors:

Youra Adel Choi,

Joo-Young Hwang,

Jaeheon JeongAuthors Info & Claims

ISCA '18: Proceedings of the 45th Annual International Symposium on Computer Architecture

Pages 425 - 438

https://doi.org/10.1109/ISCA.2018.00043

Published: 02 June 2018 Publication History

Abstract

Performance critical transaction and storage systems require fast persistence of write data. Typically, a non-volatile RAM (NVRAM) is employed on the datapath to the permanent storage, to temporarily and quickly store write data before the system acknowledges the write request. NVRAM is commonly implemented with battery-backed DRAM. Unfortunately, battery-backed DRAM is small and costly, and occupies a precious DIMM slot. In this paper, we make a case for dual, byte- and block-addressable solid-state drive (2B-SSD), a novel NAND flash SSD architecture designed to offer a dual view of byte addressability and traditional block addressability at the same time. Unlike a conventional storage device, 2B-SSD allows accessing the same file with two independent byte-and block- I/O paths. It controls the data transfer between its internal DRAM and NAND flash memory through an intuitive software interface, and manages the mapping of the two address spaces. 2B-SSD realizes a wholly different way and speed of accessing files on a storage device; applications can access them directly using memory-mapped I/O, and moreover write with a DRAM-like latency. To quantify the benefits of 2B-SSD, we modified logging subsystems of major database engines to store log records directly on it without buffering them in the host memory. When running popular workloads, we measured throughput gains in the range of 1.2X and 2.8X with no risk of data loss.

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2B-SSD: the case for dual, byte- and block-addressable solid-state drives

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ISCA '18: Proceedings of the 45th Annual International Symposium on Computer Architecture

June 2018

884 pages

ISBN:9781538659847

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IEEE Press

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Published: 02 June 2018

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ISCA '18

ISCA '18: The 45th Annual International Symposium on Computer Architecture

June 2 - 6, 2018

California, Los Angeles

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Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Yang ZWang QLiao XLu YHuang KShu JMa XWon Y(2024)TeRMProceedings of the 22nd USENIX Conference on File and Storage Technologies10.5555/3650697.3650698(1-16)Online publication date: 27-Feb-2024
https://dl.acm.org/doi/10.5555/3650697.3650698
Habicht DKhalil YWerling LGröninger TBellosa F(2024)Fundamental OS Design Considerations for CXL-based Hybrid SSDsProceedings of the 2nd Workshop on Disruptive Memory Systems10.1145/3698783.3699380(51-59)Online publication date: 3-Nov-2024
https://dl.acm.org/doi/10.1145/3698783.3699380
Kim DLee JLim KHeo JHam TLee J(2024)An LSM Tree Augmented with B+ Tree on Nonvolatile MemoryACM Transactions on Storage10.1145/363347520:1(1-24)Online publication date: 30-Jan-2024
https://dl.acm.org/doi/10.1145/3633475
Sun YYuan YYu ZKuper RSong CHuang JJi HAgarwal SLou JJeong IWang RAhn JXu TKim N(2023)Demystifying CXL Memory with Genuine CXL-Ready Systems and DevicesProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614256(105-121)Online publication date: 28-Oct-2023
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Zhou JWu JHuang WZhou YWu FShi LZhang XWang KZhu FLi SKloeckner AMoreira J(2022)Tiered HashingProceedings of the International Conference on Parallel Architectures and Compilation Techniques10.1145/3559009.3569652(211-222)Online publication date: 8-Oct-2022
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Jung MAnwar ASkourtis DKannan SMa X(2022)Hello bytes, bye blocksProceedings of the 14th ACM Workshop on Hot Topics in Storage and File Systems10.1145/3538643.3539745(45-51)Online publication date: 27-Jun-2022
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