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Advanced datapath synthesis using graph isomorphism

Published: 13 November 2017 Publication History

Abstract

This paper presents an advanced DAG-based algorithm for datapath synthesis that targets area minimization using logic-level resource sharing. The problem of identifying common specification logic is formulated using unweighted graph isomorphism problem, in contrast to a weighted graph isomorphism using AIGs. In the context of gate-level datapath circuits, our algorithm solves the unweighted graph isomorphism problem in linear time. The experiments are conducted within an industrial synthesis flow that includes the complete high-level synthesis, logic synthesis and placement and route procedures. Experimental results show a significant runtime improvements compared to the existing datapath synthesis algorithms.

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Cited By

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  • (2018)Developing synthesis flows without human knowledgeProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196026(1-6)Online publication date: 24-Jun-2018

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cover image ACM Conferences
ICCAD '17: Proceedings of the 36th International Conference on Computer-Aided Design
November 2017
1077 pages

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  • IEEE-EDS: Electronic Devices Society

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IEEE Press

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Published: 13 November 2017

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  1. datapath synthesis
  2. graph isomorphism
  3. logic synthesis
  4. resource sharing

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  • (2018)Developing synthesis flows without human knowledgeProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196026(1-6)Online publication date: 24-Jun-2018

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