[go: up one dir, main page]
More Web Proxy on the site http://driver.im/ skip to main content
10.5555/2755753.2755938acmconferencesArticle/Chapter ViewAbstractPublication PagesdateConference Proceedingsconference-collections
research-article

Axilog: language support for approximate hardware design

Published: 09 March 2015 Publication History

Abstract

Relaxing the traditional abstraction of "near-perfect" accuracy in hardware design can lead to significant gains in energy efficiency, area, and performance. To exploit this opportunity, there is a need for design abstractions that can systematically incorporate approximation in hardware design. We introduce Axilog, a set of language annotations, that provides the necessary syntax and semantics for approximate hardware design and reuse in Verilog. Axilog enables the designer to relax the accuracy requirements in certain parts of the design, while keeping the critical parts strictly precise. Axilog is coupled with a Relaxability Inference Analysis that automatically infers the relaxable gates and connections from the designer's annotations. The analysis provides formal safety guarantees that approximation will only affect the parts that the designer intended to approximate, referred to as relaxable elements. Finally, the paper describes a synthesis flow that approximates only the relaxable elements. Axilog enables applying approximation in the synthesis process while abstracting away the details of approximate synthesis from the designer. We evaluate Axilog, its analysis, and the synthesis flow using a diverse set of benchmark designs. The results show that the intuitive nature of the language extensions coupled with the automated analysis enables safe approximation of designs even with thousands of lines of code. Applying our approximate synthesis flow to these designs yields, on average, 54% energy savings and 1.9X area reduction with 10% output quality loss.

References

[1]
H. Esmaeilzadeh, E. Blem, R. Amant, K. Sankaralingam, and D. Burger, "Dark silicon and the end of multicore scaling," in ISCA, 2011.
[2]
L. N. Chakrapani, P. Korkmaz, B. E. Akgul, and K. V. Palem, "Probabilistic system-on-a-chip architectures," in TODAES, 2007.
[3]
H. Cho, L. Leem, and S. Mitra, "Ersa: Error resilient system architecture for probabilistic applications," in TCAD, 2012.
[4]
V. Gupta et al., "IMPACT: imprecise adders for low-power approximate computing," in ISLPED, 2011.
[5]
R. Ye, T. Wang, F. Yuan, R. Kumar, and Q. Xu, "On reconfiguration-oriented approximate adder design and its application," in ICCAD, 2013.
[6]
D. Shin and S. K. Gupta, "Approximate logic synthesis for error tolerant applications," in DATE, 2010.
[7]
P. Kulkarni, P. Gupta, and M. Ercegovac, "Trading accuracy for power with an underdesigned multiplier architecture," in VLSI, 2011.
[8]
A. Kahng and S. Kang, "Accuracy-configurable adder for approximate arithmetic designs," in DAC, 2012.
[9]
D. Mohapatra et al., "Design of voltage-scalable meta-functions for approximate computing," in DATE, 2011.
[10]
S.-L. Lu, "Speeding up processing with approximation circuits," Computer, 2004.
[11]
S. Venkataramani et al., "Salsa: systematic logic synthesis of approximate circuits," in DAC, 2012.
[12]
K. Nepal, Y. Li, R. Bahar, and S. Reda, "Abacus: a technique for automated behavioral synthesis of approximate computing circuits," in DATE, 2014.
[13]
Y. Liu et al., "On logic synthesis for timing speculation," in ICCAD, 2012.
[14]
A. Lingamneni et al., "Algorithmic methodologies for ultra-efficient inexact architectures for sustaining technology scaling," in CF, 2012.
[15]
J. Miao, A. Gerstlauer, and M. Orshansky, "Approximate logic synthesis under general error magnitude and frequency constraints," in ICCAD, 2013.
[16]
S. Ramasubramanian et al., "Relax-and-retime: A methodology for energy-efficient recovery based design," in DAC, 2013.
[17]
M. Kamal, A. Ghasemazar, A. Afzali-Kusha, and M. Pedram, "Improving efficiency of extensible processors by using approximate custom instructions," in DATE, 2014.
[18]
A. Sampson et al., "EnerJ: Approximate data types for safe and general low-power computation," PLDI, 2011.
[19]
M. Carbin, S. Misailovic, and M. Rinard, "Verifying quantitative reliability of programs that execute on unreliable hardware," 2013.
[20]
A. Rahimi, A. Marongiu, R. Gupta, and L. Benini, "A variability-aware OpenMP environment for efficient execution of accuracy-configurable computation on shared-fpu processor clusters," in CODES+ISSS, 2013.

Cited By

View all
  • (2019)Software Development Lifecycle for Energy EfficiencyACM Computing Surveys10.1145/333777352:4(1-33)Online publication date: 30-Aug-2019
  • (2019)Enhancing Speculative Execution With Selective Approximate ComputingACM Transactions on Design Automation of Electronic Systems10.1145/330765124:2(1-29)Online publication date: 14-Feb-2019
  • (2018)In-DRAM near-data approximate acceleration for GPUsProceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques10.1145/3243176.3243188(1-14)Online publication date: 1-Nov-2018
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences
DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition
March 2015
1827 pages
ISBN:9783981537048

Sponsors

Publisher

EDA Consortium

San Jose, CA, United States

Publication History

Published: 09 March 2015

Check for updates

Qualifiers

  • Research-article

Conference

DATE '15
Sponsor:
  • EDAA
  • EDAC
  • SIGDA
  • Russian Acadamy of Sciences
DATE '15: Design, Automation and Test in Europe
March 9 - 13, 2015
Grenoble, France

Acceptance Rates

DATE '15 Paper Acceptance Rate 206 of 915 submissions, 23%;
Overall Acceptance Rate 518 of 1,794 submissions, 29%

Upcoming Conference

DATE '25
Design, Automation and Test in Europe
March 31 - April 2, 2025
Lyon , France

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)3
  • Downloads (Last 6 weeks)0
Reflects downloads up to 11 Dec 2024

Other Metrics

Citations

Cited By

View all
  • (2019)Software Development Lifecycle for Energy EfficiencyACM Computing Surveys10.1145/333777352:4(1-33)Online publication date: 30-Aug-2019
  • (2019)Enhancing Speculative Execution With Selective Approximate ComputingACM Transactions on Design Automation of Electronic Systems10.1145/330765124:2(1-29)Online publication date: 14-Feb-2019
  • (2018)In-DRAM near-data approximate acceleration for GPUsProceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques10.1145/3243176.3243188(1-14)Online publication date: 1-Nov-2018
  • (2018)Local memory-aware kernel perforationProceedings of the 2018 International Symposium on Code Generation and Optimization10.1145/3168814(278-287)Online publication date: 24-Feb-2018
  • (2017)Approximate Memristive In-memory ComputingACM Transactions on Embedded Computing Systems10.1145/312652616:5s(1-18)Online publication date: 27-Sep-2017
  • (2016)Concise loads and storesThe 49th Annual IEEE/ACM International Symposium on Microarchitecture10.5555/3195638.3195688(1-13)Online publication date: 15-Oct-2016
  • (2016)SEERADProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972153(1481-1484)Online publication date: 14-Mar-2016
  • (2016)GraterProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972106(1279-1284)Online publication date: 14-Mar-2016
  • (2016)AxGamesACM SIGARCH Computer Architecture News10.1145/2980024.287237644:2(623-636)Online publication date: 25-Mar-2016
  • (2016)AxGamesACM SIGPLAN Notices10.1145/2954679.287237651:4(623-636)Online publication date: 25-Mar-2016
  • Show More Cited By

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media