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Bus designs for time-probabilistic multicore processors

Published: 24 March 2014 Publication History

Abstract

Probabilistic Timing Analysis (PTA) reduces the amount of information needed to provide tight WCET estimates in real-time systems with respect to classic timing analysis. PTA imposes new requirements on hardware design that have been shown implementable for single-core architectures. However, no support has been proposed for multicores so far.
In this paper, we propose several probabilistically-analysable bus designs for multicore processors ranging from 4 cores connected with a single bus, to 16 cores deploying a hierarchical bus design. We derive analytical models of the probabilistic timing behaviour for the different bus designs, show their suitability for PTA and evaluate their hardware cost. Our results show that the proposed bus designs (i) fulfil PTA requirements, (ii) allow deriving WCET estimates with the same cost and complexity as in single-core processors, and (iii) provide higher guaranteed performance than single-core processors, 3.4x and 6.6x on average for an 8-core and a 16-core setup respectively.

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Cited By

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  • (2019)Probabilistic Worst-Case Timing AnalysisACM Computing Surveys10.1145/330128352:1(1-35)Online publication date: 13-Feb-2019
  • (2019)Towards limiting the impact of timing anomalies in complex real-time processorsProceedings of the 24th Asia and South Pacific Design Automation Conference10.1145/3287624.3287655(27-32)Online publication date: 21-Jan-2019
  • (2019)Time-Randomized Wormhole NoCs for Critical ApplicationsACM Journal on Emerging Technologies in Computing Systems10.1145/328102915:1(1-23)Online publication date: 28-Jan-2019
  • Show More Cited By

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Information

Published In

cover image ACM Other conferences
DATE '14: Proceedings of the conference on Design, Automation & Test in Europe
March 2014
1959 pages
ISBN:9783981537024

Sponsors

  • EDAA: European Design Automation Association
  • ECSI
  • EDAC: Electronic Design Automation Consortium
  • IEEE Council on Electronic Design Automation (CEDA)
  • The Russian Academy of Sciences: The Russian Academy of Sciences

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European Design and Automation Association

Leuven, Belgium

Publication History

Published: 24 March 2014

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DATE '14
Sponsor:
  • EDAA
  • EDAC
  • The Russian Academy of Sciences
DATE '14: Design, Automation and Test in Europe
March 24 - 28, 2014
Dresden, Germany

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

View all
  • (2019)Probabilistic Worst-Case Timing AnalysisACM Computing Surveys10.1145/330128352:1(1-35)Online publication date: 13-Feb-2019
  • (2019)Towards limiting the impact of timing anomalies in complex real-time processorsProceedings of the 24th Asia and South Pacific Design Automation Conference10.1145/3287624.3287655(27-32)Online publication date: 21-Jan-2019
  • (2019)Time-Randomized Wormhole NoCs for Critical ApplicationsACM Journal on Emerging Technologies in Computing Systems10.1145/328102915:1(1-23)Online publication date: 28-Jan-2019
  • (2018)On the Reliability and Tightness of GP and Exponential Models for Probabilistic WCET EstimationACM Transactions on Design Automation of Electronic Systems10.1145/318515423:3(1-27)Online publication date: 16-Mar-2018
  • (2018)RPRProceedings of the 33rd Annual ACM Symposium on Applied Computing10.1145/3167132.3167197(593-600)Online publication date: 9-Apr-2018
  • (2017)Design and implementation of a fair credit-based bandwidth sharing scheme for busesProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130600(926-929)Online publication date: 27-Mar-2017
  • (2017)Optimal functional unit assignment and voltage selection for pipelined MPSoC with guaranteed probability on time performanceACM SIGPLAN Notices10.1145/3140582.308103652:5(41-50)Online publication date: 21-Jun-2017
  • (2017)Optimal functional unit assignment and voltage selection for pipelined MPSoC with guaranteed probability on time performanceProceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems10.1145/3078633.3081036(41-50)Online publication date: 21-Jun-2017
  • (2016)Random moduloProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898076(1-6)Online publication date: 5-Jun-2016
  • (2015)Timing analysis of an avionics case study on complex hardware/software platformsProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2755843(397-402)Online publication date: 9-Mar-2015
  • Show More Cited By

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