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A proof-carrying based framework for trusted microprocessor IP

Published: 18 November 2013 Publication History

Abstract

We introduce a proof-carrying based framework for assessing the trustworthiness of third-party hardware Intellectual Property (IP), particularly geared toward microprocessor cores. This framework enables definition of and formal reasoning on security properties, which, in turn, are used to certify the genuineness and trustworthiness of the instruction set and, by extension, are used to prevent insertion of malicious functionality in the Hardware Description Language (HDL) code of an acquired microprocessor core. Security properties and trustworthiness proofs are derived based on a new formal hardware description language (formal-HDL), which is developed as part of the framework along with conversion rules to/from other HDLs to enable general applicability to IP cores independent of coding language. The proposed framework, along with the ability of a sample set of pertinent security properties to detect malicious IP modifications, is demonstrated on an 8051 microprocessor core.

References

[1]
INRIA, "The coq proof assistant," September 2010, http://coq.inria.fr/.
[2]
E. Love, Y. Jin, and Y. Makris, "Proof-carrying hardware intellectual property: A pathway to trusted module acquisition," IEEE Transactions on Information Forensics and Security, vol. 7, no. 1, pp. 25--40, 2012.
[3]
S. Drzevitzky, U. Kastens, and M. Platzner, "Proof-carrying hardware: Towards runtime verification of reconfigurable modules," in International Conference on Reconfigurable Computing and FPGAs, 2009, pp. 189--194.
[4]
S. Drzevitzky and M. Platzner, "Achieving hardware security for reconfigurable systems on chip by a proof-carrying code approach," in 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011, pp. 1--8.
[5]
Y. Jin and Y. Makris, "Proof carrying-based information flow tracking for data secrecy protection and hardware trust," in IEEE 30th VLSI Test Symposium (VTS), 2012, pp. 252--257.
[6]
Y. Jin, M. Maniatakos, and Y. Makris, "Exposing vulnerabilities of untrusted computing platforms," in Computer Design (ICCD), IEEE 30th International Conference on, 2012, pp. 131--134.
[7]
L. Lin, M. Kasper, T. Guneysu, C. Paar, and W. Burleson, "Trojan side-channels: Lightweight hardware Trojans through side-channel engineering," in Cryptographic Hardware and Embedded Systems, vol. 5747 of LNCS, pp. 382--395. Springer-Verlag Berlin, 2009.
[8]
Thomas Braibant, "Coquet: A coq library for verifying hardware," in Certified Programs and Proofs, Jean-Pierre Jouannaud and Zhong Shao, Eds., vol. 7086 of Lecture Notes in Computer Science, pp. 330--345. Springer Berlin Heidelberg, 2011.
[9]
http://www.opencores.org/projects.
[10]
Intel Corporation, "Intel mcs51 family user manual," 1981.

Cited By

View all
  • (2019)SecChisel Framework for Security Verification of Secure Processor ArchitecturesProceedings of the 8th International Workshop on Hardware and Architectural Support for Security and Privacy10.1145/3337167.3337174(1-8)Online publication date: 23-Jun-2019
  • (2018)ASAXProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201626(84-89)Online publication date: 22-Jan-2018
  • (2017)Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IPProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130777(1707-1712)Online publication date: 27-Mar-2017
  • Show More Cited By

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Published In

cover image ACM Conferences
ICCAD '13: Proceedings of the International Conference on Computer-Aided Design
November 2013
871 pages
ISBN:9781479910694
  • General Chair:
  • Jörg Henkel

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IEEE Press

Publication History

Published: 18 November 2013

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  • Research-article

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ICCAD'13
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ICCAD'13: The International Conference on Computer-Aided Design
November 18 - 21, 2013
California, San Jose

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ICCAD '13 Paper Acceptance Rate 92 of 354 submissions, 26%;
Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

View all
  • (2019)SecChisel Framework for Security Verification of Secure Processor ArchitecturesProceedings of the 8th International Workshop on Hardware and Architectural Support for Security and Privacy10.1145/3337167.3337174(1-8)Online publication date: 23-Jun-2019
  • (2018)ASAXProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201626(84-89)Online publication date: 22-Jan-2018
  • (2017)Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IPProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130777(1707-1712)Online publication date: 27-Mar-2017
  • (2015)Detecting malicious modifications of data in third-party intellectual property coresProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744823(1-6)Online publication date: 7-Jun-2015

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