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research-article

Design rule optimization of regular layout for leakage reduction in nanoscale design

Authors:

Anupama R. Subramaniam,

Yu CaoAuthors Info & Claims

ASP-DAC '08: Proceedings of the 2008 Asia and South Pacific Design Automation Conference

Pages 474 - 479

Published: 21 January 2008 Publication History

Abstract

The effect of non-rectilinear gate (NRG) due to sub-wavelength lithograph dramatically increases the leakage current by more than 15X. To mitigate this penalty, we have developed a systematic procedure to optimize key layout parameters in regular layout with minimum area and speed overhead. As demonstrated in 65nm technology, the optimization of regular layout achieves more than 70% reduction in leakage under NRG, with area penalty of ~10% and marginal impact on circuit speed and active power.

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Cited By

Ban YSundareswaran SPan DSaxena PChang Y(2010)Total sensitivity based dfm optimization of standard library cellsProceedings of the 19th international symposium on Physical design10.1145/1735023.1735053(113-120)Online publication date: 14-Mar-2010
https://dl.acm.org/doi/10.1145/1735023.1735053
Ghaida RGupta PRoychowdhury J(2009)A framework for early and systematic evaluation of design rulesProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687513(615-622)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687513
Wang CZhao WLiu FChen MCao YRoychowdhury J(2009)Modeling of layout-dependent stress effect in CMOS designProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687496(513-520)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687496
Show More Cited By

Index Terms

Design rule optimization of regular layout for leakage reduction in nanoscale design
1. Hardware

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Information & Contributors

Information

Published In

cover image ACM Conferences

ASP-DAC '08: Proceedings of the 2008 Asia and South Pacific Design Automation Conference

January 2008

812 pages

ISBN:9781424419227

General Chair:
Chong-Min Kyung,
Program Chairs:
Kiyoung Choi,
Soonhoi Ha

Sponsors

IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEEK: The Institute of Electronics Engineers of Korea

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 21 January 2008

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Research-article

Conference

ASPDAC '08

Sponsor:

SIGDA
IEEK

ASPDAC '08: Asia and South Pacific Design Automation Conference

January 21 - 24, 2008

Seoul, Korea

Acceptance Rates

ASP-DAC '08 Paper Acceptance Rate 122 of 350 submissions, 35%;

Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

Ban YSundareswaran SPan DSaxena PChang Y(2010)Total sensitivity based dfm optimization of standard library cellsProceedings of the 19th international symposium on Physical design10.1145/1735023.1735053(113-120)Online publication date: 14-Mar-2010
https://dl.acm.org/doi/10.1145/1735023.1735053
Ghaida RGupta PRoychowdhury J(2009)A framework for early and systematic evaluation of design rulesProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687513(615-622)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687513
Wang CZhao WLiu FChen MCao YRoychowdhury J(2009)Modeling of layout-dependent stress effect in CMOS designProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687496(513-520)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687496
Ye YLiu FNassif SCao YFix L(2008)Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughnessProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391698(900-905)Online publication date: 8-Jun-2008
https://dl.acm.org/doi/10.1145/1391469.1391698

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