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Hard real-time reconfiguration port scheduling

Published: 16 April 2007 Publication History

Abstract

When modern partially and dynamically reconfigurable FPGAs are to be used as resources in hard real-time systems, the two dimensions area and time have to be considered in the focus of availability and deadlines. In particular, area requirements must be guaranteed for the tasks' duration. While execution environments that abstract the space demand of tasks exist and methods for occupancy of resources over time are discussed in the literature, few works focus on another fundamental bottleneck, the reconfiguration port. As all resource requests are served by this mutually exclusive device, profound concepts for scheduling the port access are vital requirements for FPGA realtime scheduling. Nevertheless, as the port must be accessed sequentially, we can inherit and apply monoprocessor scheduling concepts that are well researched. In this paper, we introduce monoprocessor scheduling algorithms for the reconfiguration port of FPGAs.

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Cited By

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  • (2018)Timing Analysis of Tasks on Runtime Reconfigurable ProcessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.257230425:1(294-307)Online publication date: 29-Dec-2018
  • (2014)Reconfigurable Multiprocessor SystemsACM SIGARCH Computer Architecture News10.1145/2693714.269372242:4(39-44)Online publication date: 3-Dec-2014
  • (2014)An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systemsACM Transactions on Embedded Computing Systems10.1145/256003713:4(1-24)Online publication date: 10-Mar-2014
  • Show More Cited By

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cover image ACM Conferences
DATE '07: Proceedings of the conference on Design, automation and test in Europe
April 2007
1741 pages
ISBN:9783981080124

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EDA Consortium

San Jose, CA, United States

Publication History

Published: 16 April 2007

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DATE07
Sponsor:
  • EDAA
  • SIGDA
  • The Russian Academy of Sciences
DATE07: Design, Automation and Test in Europe
April 16 - 20, 2007
Nice, France

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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March 31 - April 2, 2025
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Cited By

View all
  • (2018)Timing Analysis of Tasks on Runtime Reconfigurable ProcessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.257230425:1(294-307)Online publication date: 29-Dec-2018
  • (2014)Reconfigurable Multiprocessor SystemsACM SIGARCH Computer Architecture News10.1145/2693714.269372242:4(39-44)Online publication date: 3-Dec-2014
  • (2014)An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systemsACM Transactions on Embedded Computing Systems10.1145/256003713:4(1-24)Online publication date: 10-Mar-2014
  • (2011)A (fault-tolerant)2 scheduler for real-time HW tasksProceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications10.5555/1987535.1987548(79-87)Online publication date: 23-Mar-2011
  • (2011)Applying dynamic reconfiguration in the mobile robotics domainACM Transactions on Reconfigurable Technology and Systems10.1145/2000832.20008414:3(1-22)Online publication date: 22-Aug-2011
  • (2009)An approximation algorithm for scheduling on heterogeneous reconfigurable resourcesACM Transactions on Embedded Computing Systems10.1145/1596532.15965379:1(1-20)Online publication date: 29-Oct-2009

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