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Application-specific 3D Network-on-Chip design using simulated allocation

Authors:

Pingqiang Zhou,

Sachin S. SapatnekarAuthors Info & Claims

ASPDAC '10: Proceedings of the 2010 Asia and South Pacific Design Automation Conference

Pages 517 - 522

Published: 18 January 2010 Publication History

Abstract

Three-dimensional (3D) silicon integration technologies have provided new opportunities for Network-on-Chip (NoC) architecture design in Systems-on-Chip (SoCs). In this paper, we consider the application-specific NoC architecture design problem in a 3D environment. We present an efficient floorplan-aware 3D NoC synthesis algorithm, based on simulated allocation, a stochastic method for traffic flow routing, and accurate power and delay models for NoC components. We demonstrate that this method finds greatly improved topologies for various design objectives such as NoC power (average savings of 34%), network latency (average reduction of 35%) and chip temperature (average reduction of 20%).

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Cited By

Lee DDas SDoppa JPande PChakrabarty K(2018)Performance and Thermal Tradeoffs for Energy-Efficient Monolithic 3D Network-on-ChipACM Transactions on Design Automation of Electronic Systems10.1145/322304623:5(1-25)Online publication date: 22-Aug-2018
https://dl.acm.org/doi/10.1145/3223046
Zhou PYuh PSapatnekar S(2012)Optimized 3D Network-on-Chip Design Using Simulated AllocationACM Transactions on Design Automation of Electronic Systems10.1145/2159542.215954417:2(1-19)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.1145/2159542.2159544
Li XHammami OAtienza DXie YAyala JStevens K(2011)Multi-objective topology synthesis and FPGA prototyping framework of application specific network-on-chipProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973021(55-60)Online publication date: 2-May-2011
https://dl.acm.org/doi/10.1145/1973009.1973021
Show More Cited By

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Information & Contributors

Information

Published In

cover image ACM Conferences

ASPDAC '10: Proceedings of the 2010 Asia and South Pacific Design Automation Conference

January 2010

920 pages

ISBN:9781605588377

General Chair:
Youn-Long Lin
National Tsing Hua University

Sponsors

TICD: TICD
SIGDA: ACM Special Interest Group on Design Automation
IEEE CAS

Publisher

IEEE Press

Publication History

Published: 18 January 2010

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Research-article

Conference

ASPDAC '10

Sponsor:

TICD
SIGDA

ASPDAC '10: Asia and South Pacific Design Automation Conference

January 18 - 21, 2010

Taipei, Taiwan

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

Lee DDas SDoppa JPande PChakrabarty K(2018)Performance and Thermal Tradeoffs for Energy-Efficient Monolithic 3D Network-on-ChipACM Transactions on Design Automation of Electronic Systems10.1145/322304623:5(1-25)Online publication date: 22-Aug-2018
https://dl.acm.org/doi/10.1145/3223046
Zhou PYuh PSapatnekar S(2012)Optimized 3D Network-on-Chip Design Using Simulated AllocationACM Transactions on Design Automation of Electronic Systems10.1145/2159542.215954417:2(1-19)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.1145/2159542.2159544
Li XHammami OAtienza DXie YAyala JStevens K(2011)Multi-objective topology synthesis and FPGA prototyping framework of application specific network-on-chipProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973021(55-60)Online publication date: 2-May-2011
https://dl.acm.org/doi/10.1145/1973009.1973021
Kapadia NPasricha SAtienza DXie YAyala JStevens K(2011)VISIONProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973017(31-36)Online publication date: 2-May-2011
https://dl.acm.org/doi/10.1145/1973009.1973017

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