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A modeling method by eliminating execution traces for performance evaluation

Published: 08 March 2010 Publication History

Abstract

This paper describes a system-level modeling method in UML for performance evaluation of embedded systems. The core technology of this modeling method is reverse modeling based on dynamic analysis. A case study of real MFPs (multifunction peripherals/printers) is presented in this paper to evaluate the modeling method.

References

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L. C. Briand, Y. Labiche, and J. Leduc. Toward the reverse engineering of UML sequence diagrams for distributed Java software. IEEE Transactions on Software Engineering, 32(9):642--663, September 2006.
[2]
S.-U. Jeon, J.-E. Hong, and D.-H. Bae. Interaction-based behavior modeling of embedded software using UML 2.0. In Proceedings of Ninth IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC 2006), pages 351--355, Gyeongju, Korea, April 2006. IEEE Computer Society.
[3]
H. Liang, J. Dingel, and Z. Diskin. A comparative survey of scenario-based to state-based model synthesis approaches. In Proceedings of the 2006 International Workshop on Scenarios and State Machines (SCESM 2006, co-located to ICSE 2006), pages 5--12, Shanghai, China, May 2006. IEEE Computer Society / ACM.
[4]
N. Ohba and K. Takano. Hardware debugging method based on signal transitions and transactions. In Proceedings of the 11th Asia South Pacific Design Automation Conference (ASP-DAC 2006), pages 454--459, Yokohama, Japan, January 2006.
[5]
C. A. Prete, G. Prina, and L. Ricciardi. A trace-driven simulator for performance evaluation of cache-based multiprocessor systems. IEEE Transactions on Parallel and Distributed Systems, 6(9):915--929, September 1995.
[6]
P. Tonella and A. Potrich. Reverse engineering of the interaction diagrams from C++ code. In Proceedings of the 19th International Conference on Software Maintenance (ICSM 2003), pages 159--168, Kloveniersburgwal 29, Amsterdam, The Netherlands, September 2003. IEEE Computer Society.

Cited By

View all
  • (2014)A dynamic computation method for fast and accurate performance evaluation of multi-core architecturesProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2617027(1-6)Online publication date: 24-Mar-2014
  • (2011)Coarse-grained simulation method for performance evaluation of a shared memory systemProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950903(413-418)Online publication date: 25-Jan-2011

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Information & Contributors

Information

Published In

cover image ACM Conferences
DATE '10: Proceedings of the Conference on Design, Automation and Test in Europe
March 2010
1868 pages
ISBN:9783981080162

Sponsors

  • EDAA: European Design Automation Association
  • ECSI
  • EDAC: Electronic Design Automation Consortium
  • SIGDA: ACM Special Interest Group on Design Automation
  • The IEEE Computer Society TTTC
  • The IEEE Computer Society DATC
  • The Russian Academy of Sciences: The Russian Academy of Sciences

Publisher

European Design and Automation Association

Leuven, Belgium

Publication History

Published: 08 March 2010

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  • Research-article

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DATE '10
Sponsor:
  • EDAA
  • EDAC
  • SIGDA
  • The Russian Academy of Sciences
DATE '10: Design, Automation and Test in Europe
March 8 - 12, 2010
Germany, Dresden

Acceptance Rates

Overall Acceptance Rate 518 of 1,794 submissions, 29%

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DATE '25
Design, Automation and Test in Europe
March 31 - April 2, 2025
Lyon , France

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Cited By

View all
  • (2014)A dynamic computation method for fast and accurate performance evaluation of multi-core architecturesProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2617027(1-6)Online publication date: 24-Mar-2014
  • (2011)Coarse-grained simulation method for performance evaluation of a shared memory systemProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950903(413-418)Online publication date: 25-Jan-2011

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