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Thermal optimization in multi-granularity multi-core floorplanning

Authors:

Michael B. Healy,

Hsien-Hsin S. Lee,

Gabriel H. Loh,

Sung Kyu LimAuthors Info & Claims

ASP-DAC '09: Proceedings of the 2009 Asia and South Pacific Design Automation Conference

Pages 43 - 48

Published: 19 January 2009 Publication History

Abstract

Multi-core microarchitectures require a careful balance between many competing objectives to achieve the highest possible performance. Integrated Early Analysis is the consideration of all of these factors at an early stage. Toward this goal, this work presents the first adaptive multi-granularity multi-core microarchitecture-level floorplanner that simultaneously optimizes temperature and performance, and considers memory bus length. We include simultaneous optimization at both the module-level and the core/cache-bank level. Related experiments show that our methodology is effective for optimizing multi-core architectures.

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Cited By

Chen YKursun EMotschman DJohnson CXie YChang NNakamura HInoue KOsada KPoncino M(2011)Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designsProceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design10.5555/2016802.2016896(397-402)Online publication date: 1-Aug-2011
https://dl.acm.org/doi/10.5555/2016802.2016896
Golshan SBozorgzadeh ESchafer BWakabayashi KHomayoun HVeidenbaum AOklobdzija VPangle BChang NShanbhag NKim C(2010)Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systemsProceedings of the 16th ACM/IEEE international symposium on Low power electronics and design10.1145/1840845.1840856(49-54)Online publication date: 18-Aug-2010
https://dl.acm.org/doi/10.1145/1840845.1840856

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Information & Contributors

Information

Published In

cover image ACM Conferences

ASP-DAC '09: Proceedings of the 2009 Asia and South Pacific Design Automation Conference

January 2009

902 pages

ISBN:9781424427482

General Chair:
Kazutoshi Wakabayashi
NEC Corporation

Sponsors

IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IPSJ SIGSLDM: Information Processing Society of Japan - SIG System LSI Design Methodology
IEICE ESS: Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society

Publisher

IEEE Press

Publication History

Published: 19 January 2009

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Research-article

Conference

ASPDAC '09

Sponsor:

SIGDA
IPSJ SIGSLDM
IEICE ESS

ASPDAC '09: Asia and South Pacific Design Automation Conference

January 19 - 22, 2009

Yokohama, Japan

Acceptance Rates

Overall Acceptance Rate 466 of 1,454 submissions, 32%

Upcoming Conference

ASPDAC '25

Sponsor:
sigda

30th Asia and South Pacific Design Automation Conference

January 20 - 23, 2025

Tokyo , Japan

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Cited By

Chen YKursun EMotschman DJohnson CXie YChang NNakamura HInoue KOsada KPoncino M(2011)Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designsProceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design10.5555/2016802.2016896(397-402)Online publication date: 1-Aug-2011
https://dl.acm.org/doi/10.5555/2016802.2016896
Golshan SBozorgzadeh ESchafer BWakabayashi KHomayoun HVeidenbaum AOklobdzija VPangle BChang NShanbhag NKim C(2010)Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systemsProceedings of the 16th ACM/IEEE international symposium on Low power electronics and design10.1145/1840845.1840856(49-54)Online publication date: 18-Aug-2010
https://dl.acm.org/doi/10.1145/1840845.1840856

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